Conventional digital signal processor (DSP) cores are implemented to execute instructions that are taken from a program memory. The program memory can be implemented as a random access memory. (RAM), a read only memory (ROM) or combination of RAM and ROM. The program data stored in ROM cannot be modified after initial programming.
Patch logic gives a programmer an option to “overwrite” part of the code in the ROM, and replace them with different instructions in order to fix bugs or enhance a particular feature. Patch logic is often implemented by redirecting the normal flow of the code to a patch code.
Conventional approaches, such as U.S. Pat. No. 4,610,000, implement patches that are directed to specific tasks such as patching macrocodes. Patching a program ROM of a core processor with a one to one patch does not take into account the core processor read operation timing and the instruction set.
It would be desirable to implement patching of program code by redirecting the normal flow of the code to fix bugs or add instructions to an existing code. It would also be desirable to implement such patching of code by redirecting the code to a patch RAM. Such a patch would be particularly useful in integrated circuit chips with an embedded program ROM.